| - Analog, Digital Optimum |
| - Input/ Output Floating Type |
| - Low Noise 25mVp-p |
| - Short Circuit, Over-Current, |
| No Tantalum Capacitor |
| - 5-Size Metallic shield |
| structure |
| - Built-in EMI Line Filter |
| - Over-Temp. Protection |
| - Long-Life with TCT Patent |
| Circuit |
| - I/O Isolation DC500V |
| - Low Drift 50mV/8H |
| - Operating Temp. Range |
| 25ºC to +71ºC |
| (Temp. derating required from 50°C) |
Note!
This is a product outline.
Please refer to the catalogue, when designing. |
|
Models
BR-S Series |
Input V
Vdc |
Output V
Vdc |
Output I
mA |
Line Reg
%(typ) |
Load Reg
%(typ) |
Ripple/Noise
mVpp(typ) |
Efficiency
%(typ) |
| BY05-05S-60 |
4.75-6
*2 |
5 |
0-600 |
0.5 |
0.5 |
25 |
60 |
| BY05-09S-45 |
9 |
0-450 |
| BY05-12S-38 |
12 |
0-380 |
| BY05-15S-30 |
15 |
0-300 |
| BY05-05S-60 *1 |
10.8-13.2 |
5 |
0-600 |
0.5 |
0.5 |
25 |
60 |
| *1: BR12-05S-60 is for order-received product. |
|
| *2: Derating required from input voltage above 5.25V |
|
|
|
| <Outline> |
|
 |
BR-S Series |
Dimensions: mm
Weight: 25g typ |
|
|
<Standard Connection Circuit Diagram>
_
__-Recommended Capacitor
C1= 47µF-100µF
(Electrolytic or multilayer ceramic capacitor)
C2=1µF (Multilayer
ceramic capacitor )
Basically,
external capacitors are not requied, but noise can be lowered by reducing
power line
impedance
and load line impedance.
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